1. Technical Field
The invention is related to monolithic gallium arsenide field effect transistor (FET) logic circuits and to logic circuit building blocks capable of forming a complete family of logic circuits.
2. Background Art
Various types of gallium arsenide logic circuits try to optimize delays or power consumption or noise margins, but all, in some manner, try to compensate for the gallium arsenide metal semiconductor FET (MESFET) being less than an ideal switch, due to forward conductance through the gate junction. The gate of a MESFET is connected to the channel through a Schottky barrier junction (hence, the gate is referred to as a Schottky barrier gate). In most cases, this causes an interaction between the input and the output of a logic stage comprising the MESFET, or limits the excursion of the input signal, or adds current paths that have to be considered carefully to make sure they do not cause any problems.